We analog designers take great pains to make our amplifiers stable when we design them, but there are many situations that cause them to oscillate in the real world. Various types of loads can make them sing. Improperly designed feedback networks can cause instability. Insufficient supply bypassing can offend. Finally, inputs and outputs can oscillate by themselves as one-port systems. This article will address common causes of oscillation and their remedies.
Figure 1a shows the block diagram of a non-rail-to-rail amplifier. The inputs control the gm block which drives the gain node and is buffered at the output. The compensation capacitor Cc is the dominant frequency response element. The return of Cc would go to ground if there were such a pin; however op amps traditionally have no ground and the capacitor current will return to one or both supplies.
Figure 1a: Typical non-rail-to-rail op amp topology
Figure 1b is a block diagram of the simplest amplifier with rail-to-rail output. The input gm ’s output current is sent through a “current coupler” that splits the drive current between the output transistors. Frequency response is dominated by the two Cc /2s, which are effectively in parallel. These two topologies describe the vast majority of op amps that use external feedback.
Figure 1b: Typical rail-to-rail op amp topology
Figure 1c shows the frequency responses of our ideal amplifiers, which display similar behavior although they are electrically different. The single-pole compensation created by gm and Cc gives a unity-gain-bandwidth product frequency of GBF=gm /(2p Cc ). The phase lag of these amplifiers drops from -180 to -270° around GBF/Avol , where Avol is the open-loop amplifier DC gain. The phase hangs in at -270° for frequencies well above this low frequency. This is known as “dominant pole compensation,” where the Cc pole dominates the response and hides various frequency limitations of the active circuitry.
Figure 1c: Idealized frequency response of op amps
Figure 2 shows the open-loop gain and phase response over frequency for the LTC6268 amplifier. This is a neat little low-noise 500MHz amplifier with rail-to-rail outputs and only 3fA bias current, and is a good example of real amplifier behavior. The dominant compensation’s -90° phase lag starts at about 0.1MHz, reaches -270° at about 8MHz, but moves past -270° beyond 30MHz. In practice, all amplifiers have high-frequency phase lags additional to the basic dominant compensation lag due to extra gain stages and the output stage. Typically, the extra phase lag starts at around GBF/10.
Figure 2: LTC6268 gain and phase vs. frequency
Stability with feedback is a matter of ‘round the loop gain and phase; or Avol times the feedback factor, or loop gain in short. If we connect the LTC6268 in unity-gain configuration, then 100% of the output voltage is fed back. At very low frequencies the output is the negative of the –input, or -180° phase lag. Compensation adds another -90° lag through the amplifier, setting -270° lag from –input to output. Oscillation will occur when the loop phase lag increases to ±360°, or multiples of it, and the loop gain is at least 1V/V or 0dB. The phase margin is a measure of how far from 360° the phase lag is when the gain is 1V/V or 0dB. Figure 2 shows us that the phase margin is about 70° (10pF red curve) at 130MHz. This is a very healthy number; phase margin down to perhaps 35° is usable.
A less popular topic is gain margin, although it is just as important a parameter. When the phase descends to zero margin at some high frequency, the amplifier will oscillate if the gain is at least 1V/V or 0dB. As shown in Figure 2, when the phase drops to 0 (or multiples of 360°, or -180 as in the figure), the gain is about -24dB at approximately 1GHz. This is a very low gain; no oscillations will occur at this frequency. In practice one wants at least 4dB of gain margin.
While the LTC6268 is quite stable at unity gain, there are a few op amps that are intentionally not. By designing the amplifier compensation to be stable only at higher closed-loop gains, design trade-offs can deliver higher slew-rate, wider GBF, and lower input noise than unity-gain-compensated. Figure 3 shows the open-loop gain and phase of the LT6230-10. This amplifier is intended to be used at a fed-back gain of 10 or higher, so the feedback network will attenuate the output by at least 10. With this feedback network we look for the frequency where the open-loop gain is 10V/V or 20dB and find a phase margin of 58° at 50MHz (±5V supplies). At unity gain, our phase margin is just about 0°, and the amplifier will oscillate.
Figure 3: LT6230-10 gain and phase vs. frequency
One observation is that all amplifiers will be more stable when providing more closed-loop gain than the minimum stable gain. Even a gain of 1.5 makes a unity-gain-stable amplifier much more stable.
While on the subject, the feedback network itself can induce oscillation. Note in Figure 4 we have placed a parasitic capacitance in parallel with the feedback divider. This is inevitable; each terminal of each component on a circuit board has about 0.5pF to ground, plus that of the traces. In practice nodes have minimum capacitance of 2pF, and ~2pF per inch of trace. It is easy to rack up 5pF of parasitic. Consider the LTC6268 providing a gain of +2. Attempting to save power, we set the values of Rf and Rg to a rather high 10kW. With Cpar = 4pF, the feedback network has a pole at 1/(2p*Rf ||Rg *Cpar ), or 8MHz.
Figure 4: Parasitic capacitance loading the feedback network
Using the fact that the phase lag of the feedback network is –atan(f/8MHz), we can estimate that 360° lag around the loop will be at about 35MHz, where the amplifier has a lag of -261° and the feedback network lags -79°. At this phase and frequency, the amplifier still has 22dB of gain while the divider gain is = 0.1114 or -19dB. The amplifier’s 22dB times the feedback -19dB yield a loop gain of +3dB at 0° phase and the circuit oscillates. One must size down the feedback resistor value to work with parasitic capacitance so that the feedback pole is well beyond the loop’s unity-gain frequency. At least a 6x pole to GBF ratio is good.
Op amp inputs themselves can be fairly capacitive, emulating Cpar . In particular low-noise and low- Vos amplifiers have large input transistors and may have larger input capacitance than other amplifiers, which loads their feedback networks. You need to consult the data sheet to see how much more capacitance will be in parallel with Cpar . Fortunately, the LT6268 has only 0.45pF, a very low value for such a low-noise amplifier. The circuit with parasitics can be simulated using Linear Technology’s macro-model running on LTspice®, which is free.
Figure 5 shows methods to make the divider more tolerant to capacitance. Figure 5a shows a non-inverting amplifier arrangement with Rin added. Assuming Vin is a low impedance source (<<Rin ), Rin will effectively attenuate the feedback signal without changing the closed loop gain. Rin will also lower the impedance of the divider, increasing the feedback pole frequency, hopefully beyond GBF. The ‘round the loop bandwidth is reduced by Rin , and the input offset and noise are magnified by it.
Figure 5a: Methods of reducing Cpar effect; non-inverting amplifier arrangement with Rin added
Figure 5b shows an inverting configuration. Rg performs the loop attenuation again without changing the closed-loop gain. In this case, the input impedance is not disturbed by “Rg ”, but noise, offset, and bandwidth are worsened.
Figure 5b: Methods of reducing Cpar effect; inverting configuration
Figure 5c shows the preferred method to compensate Cpar in a non-inverting amplifier. If we set Cf * Rf = Cpar * Rg we have a “compensated attenuator” such that the feedback divider now has the same attenuation at all frequencies and the Cpar problem is solved. Mismatch in the products will cause “bumps” in the pass band of the amplifier and “shelves” in the response where low frequency responses are flat but change to another flat level around f = 1/2p* Cpar * Rg . Figure 5d shows the equivalent Cpar compensation for inverting amplifiers. The frequency response needs to be analyzed to find a proper Cf , and the bandwidth of the amplifier is part of the analysis.
Figure 5c: Methods of reducing Cpar effect; preferred method to compensate Cpar in a non-inverting amplifier
Figure 5d: Methods of reducing Cpar effect; equivalent Cpar compensation for inverting amplifiers
Some comments on current-feedback amplifiers (CFAs) are in order here. If the amplifier in Figure 5a were a CFA, then “Rin ” would do little to modify frequency response, since the –input is a very low impedance and actively copies the +input. Noise would be somewhat worsened, and additional -input bias current would effectively occur as Vos / Rin . Likewise, the circuit in Figure 5b is unaltered by “Rg ” with respect to frequency response. The inverting input is not just a virtual ground, it’s a true low impedance to ground and is already tolerant of Cpar (inverting mode only!). DC errors are similar to those shown in Figure 5a. Figures 5c and 5d may be preferred for voltage-input op amps, but CFAs simply cannot tolerate a direct feedback capacitor without oscillation.
Just as feedback capacitance can erode phase margin, so too can load capacitance. Figure 6 shows the LTC6268 output impedance over frequency for a few gain settings. Note that the unity-gain output impedance is lower than that of higher gains. The full feedback allows the open-loop gain to reduce the inherent output impedance of the amplifier. Thus the gain of 10 output impedance in Figure 6 is generally 10x higher than the unity-gain results. There is 1/10th the ‘round the loop gain due to the feedback attenuator diminishing loop gain that otherwise would reduce the closed-loop output impedance. The open-loop output impedance is about 30W, made obvious by the flat region of the gain-of-100 curve at high frequencies. In this region, from about gain-bandwidth-frequency/100 to gain-bandwidth-frequency, there is not enough loop gain to reduce the open-loop output impedance.
Figure 6: LTC6268 output impedance vs. frequency for three gains
Capacitor loads will cause phase and amplitude lags with the open-loop output impedance. For instance, a 50pF load with our LTC6268 30Ω output impedance makes another pole at 106MHz, where the output has a phase lag of -45° and -3dB attenuation. At this frequency, the amplifier has a phase of -295° and gain of 10dB. Assuming a unity-gain feedback, we do not quite achieve oscillation because the phase has not made it to ±360° (at 106MHz). At 150MHz, however, the amplifier has 305° lag and 5dB gain. The output pole has a phase of –atan(150MHz/106MHz) = -55° and a gain of 0.577 or -4.8dB. Multiplying gains around the loop, we get 360° and +0.2dB gain, again an oscillator. 50pF appears to be the minimum load capacitance that will force the LTC6268 to oscillate.
The most common way to prevent load capacitance from causing oscillation is to simply place a small-value resistor in series with it, after the feedback connection. Values of 10Ω to 50Ω will limit the phase lag capacitive loads can induce, as well as isolate the amplifier from low capacitive impedances at very high speed. Drawbacks include DC and low frequency errors depending on resistive aspects of the load, limited frequency response at the capacitive load, and signal distortion if the load capacitance is not constant with voltage.
Oscillations caused by load capacitance can often be stopped by raising the amplifier closed-loop gain. Running the amplifier at higher closed-loop gains means that the feedback attenuator also attenuates the loop gain at frequencies where the loop phase is ±360°. For instance, if we use the LTC6268 at a closed-loop gain of +10, we see the amplifier has a gain of 10V/V or 20dB at 40MHz, where the phase lag is 285°. To achieve oscillation we would need an output pole, causing an additional 75° lag. We can solve for the output pole by using -75° = -atan(40MHz/Fpole) → Fpole = 10.6MHz. This pole frequency comes from a load capacitance of 500pF and 30Ω output impedance.
The output pole gain is 0.026. With an unloaded open-loop gain of 10 we have a ‘round the loop gain of 0.26 at the oscillation frequency, so this time we do not get oscillation, at least oscillation caused by a simple output pole. Thus we have increased load capacitance tolerated from 50pF to 500pF by raising the closed-loop gain.
Unterminated transmission lines are also very bad loads, since they present wild impedance and phase changes repetitive with frequency (see the impedance of an unterminated 9’ cable in Figure 7). If your amplifier can drive the cable safely at one low-frequency resonance, it’s likely to oscillate at some higher frequency as its own phase margin degrades. If the cable must be unterminated, then a “back-match” resistor in series with the output can isolate the cable’s radical impedance variations. Further, even though transient reflections from the unterminated end of the cable rush right back to the amplifier, the back-match resistor correctly absorbs the energy if its value matches the characteristic impedance of the cable. If the back-match doesn’t match the cable impedance, some energy will reflect from the amplifier and termination, running back down to the unterminated end. When the energy hits the end, it efficiently reflects back to the amplifier yet again, and we have a series of pulses bouncing back and forth, but attenuated each time.
Figure 7: Impedance and phase of an unterminated coaxial cable
Figure 8 shows a more complete output impedance model. The term Rout is the same 30Ω we have been discussing in the LTC6268, and we have added a term Lout . This is a combination of physical inductance and an electronic equivalent of inductance. The physical package, bond-wire, and external inductances add up to 5-15nH, smaller with smaller packages. In addition, there is an electronically generated inductance range of 20-70nH for any amplifier, especially devices using bipolar. The parasitic base resistance of the output transistor is transformed to inductance by the finite Ft of the devices.
Figure 8: Inductive part of amplifier output impedance
The hazard is that Lout can interact with CL to form a series-resonant tuned circuit whose impedance can drop to levels Rout cannot drive without, yet again, more phase lag within the loop and potential oscillation. For example, set Lout = 60nH and CL = 50pF. The resonant frequency is 92MHz, well within the passband of the LTC6268. This series-resonant circuit effectively loads the output at resonance and severely modifies loop phase around the resonance. Unfortunately, Lout is not noted in amplifier data sheets, but one can sometimes see its effect in the open-loop output impedance graphs. In general, this effect is not important for amplifiers with bandwidth less than about 50MHz.
One solution is shown Figure 9. Rsnub and Csnub create what is called a “snubber” whose purpose is to de-Q the resonant circuit so that is will not impose a very low resonant impedance at the amplifier output. Rsnub is generally valued at the reactance of CL at resonance, which is -j35Ω in this example, to bring the Q of the output resonance down to ~1. Csnub is sized to insert Rsnub fully at the output resonant frequency, that is, the reactance of Csnub <snub =10* CL is practical. Csnub unloads the amplifier at intermediate and low frequencies, especially at DC. If Csnub is very large, then the amplifier will be heavily loaded by Rsnub at medium or low frequencies, and gain accuracy, closed-loop bandwidth, and distortion may be compromised. Nevertheless with a bit of tweaking, the snubber is often useful for taming reactive loads, but it must be empirically sized.
Figure 9: Using an output snubber
A current-feedback amplifier’s –input is really a buffer output, and will also exhibit the series features of Figure 8. Thus it can oscillate by itself against a Cpar just like an output. Cpar and any associated inductance must be minimized. Unfortunately, a snubber at the –input will modify the closed-loop gain over frequency and is not useful.
Many amplifiers exhibit input impedance oddities at high frequencies. This is most true of amplifiers with two input transistors in series, as in a Darlington arrangement. Many amplifiers have an npn/pnp transistor pair at the input which behaves similarly to a Darlington over frequency. There are frequencies, generally well beyond GBF, where the real part of input impedance goes negative. An inductive source impedance will resonate with input and board capacitance, and the negative-real component fuels oscillation. When driven from an unterminated cable, this can also allow oscillation at many repetitive frequencies. If a long inductive line is unavoidable at the input, it can be broken up with a few series energy-absorbing resistors, or a medium-impedance snubber (about 300Ω) can be installed at the amplifier input lead.
The last source of oscillation to consider is a power supply bypass. Figure 10 shows a fragment of output circuitry. Lvs+ and Lvs- are inevitable series inductances of the package, IC bond-wires, physical length of the bypass capacitor (which is also inductive like any conductor), and circuit board trace inductances. Also included are outer inductance that connects local bypasses with the rest of the power bus, if it’s not a power plane. While 3-10nH may not seem like much, it is 3.8 to j12Ω at 200MHz. If an output transistor conducts large high-frequency output current, then there will be a drop across its supply inductance.
Figure 10: Power supply bypass details
The rest of the amplifier needs a quiet power supply, because over frequency it cannot reject the supply. In Figure 11 we see the power supply rejection ratio (PSRR) over frequency for the LTC6268. Because the compensation capacitors are associated to the power supplies in all op amps without ground pins, they couple supply noise into the amplifier that the gm must counteract. The PSRR diminishes as 1/f due to the compensation, and past 130MHz the supply rejection actually becomes gain.
Figure 11: LTC6268 power supply rejection over frequency
With gain in PSRR at 200MHz, output currents can disturb the supply voltages inside the LVs inductors, which through PSRR amplification become strong amplifier signals, driving output currents, creating internal supply signals, etc., causing the amplifier to oscillate. This is why all amplifiers’ supplies must be carefully bypassed with low inductance traces and components. Further, the supply bypass capacitors must be much larger than any load capacitance.
If we consider frequencies around 500MHz, our 3-10nH becomes j9.4Ω to j31.4Ω. This is high enough for the output transistor alone to oscillate inside its inductances and IC component capacitances, especially at larger output currents where the transistor gm and bandwidth increase. Special attention is required since today’s semiconductor manufacturing processes employ transistors whose bandwidths are very high, at least at large output currents.
In summary, the designer needs to consider parasitic capacitance and inductance associated with each op amp terminal, and the nature of the load. The amplifiers are designed to be stable within a nominal environment, but each application requires its own analysis.
“A very nice exegesis. I particularly liked the explanation of the output inductance arising from the base spreading resistance appearing inductive at the emitter via Ft. It is interesting how often that series R-C network appears in amplifier outputs, without necessarily any coherent explanation about its presence or sizing. I’ve found that with some very frisky input devices, even without the compound construction, with certain low-voltage-noise op amps, oscillations will occur at small closed-loop gains without some significant damping in the base lead. Although resistors are the most straightforward, certain lossy ferrites can function effectively in suppression without entailing a lot of additional noise. This may not be true if the signal frequencies are quite high, however — the loss will be noisy. Fortunately the usual applications are limited in signal-to-noise from the sources to begin with. One note, something by now which may have been noticed: the early appearances of what should be omegas are showing at time of writing as W’s. Later on they show up as undoubtedly intended as units of ohms. Maybe EDN can correct this before too many more reappearances of this piece, rendering my comment void. Brad”
“According to my understanding, Fig 4 and Fig 5b are more suitable for capacitor type of load, Fig 5c and Fig 5d are more suitable for resistor or inductor / capacitor type of load and can also be used to reduce the impact of Cpar.nnI checked several operational amplifier IC designs and found non-of them are suitable for capacitor type of load. This oscillation issue may be improved internally to make IC more suitable for capacitor type load and externally, like the cases this article presented, to create / use external zeros or poles to reduce the impact of the load or the input capacitor.”
“I’ve been embarrassed many times in emails by having MS Outlook use MS Word as the editor, and I suspect this is a similar issue. It turns out that the Omega sign in the “Symbol” font is a capital ‘W’ in any non-symbol font. So all of my Ohms become Watts in emails and other forms of text extractors which do not track the original document’s font dynamically. It’s really problematic — Should the Symbol font have been done a little more logically (e.g. Omega = ‘Z’) the problem would have been Ohms converting to impedance. Just as embarrassing!”
“On Page 1 you mention that in unity gain config at low frequencies, the output is -180 phase lag from the input. However, at low frequencies we are taught that the input at the non-inverting node = input at inverting node. Is this true only for magnitude and not phase?
” I meant phase from -input to output. With lots of feedback gain, the -input (=output) struggles to follow the +input, so there is 0 degree phase from +input to output (nearly 0; always lagging a bit) while the 'round the loop phase into the -input is nominally 180 degrees (again, lagging ever more at high frequencies).”
“Uh, yeah, working on it…”
“I think in terms of input issues being independent of output issues. Both degrade phase margin independently, and both can cause oscillation. I am not aware of any of the circuits 4 through 5's being also better or worse for output C problems.”
“Yes, and I omitted one other input one-pin oscillation cause: internal capacitance at the tail of an input diff-amp. Excess capacitance there transforms as a “super-capacitor” (need a new name, anyone want to offer one?) into a negative-real input impedance component that drops as 1/frequency squared. That is why one unnamed vendor warns users to place a modest resistor in series with the input to prevent oscillation of their low-noise amplifier.”
“I did not say that input issues are dependent of output issues. But they can have impact to each other under certain condition when they are in the same circuit. Your examples of Fig 5c and Fig 5d are about Methods of reducing Cpar effect; preferred method to compensate Cpar in a non-inverting amplifier. In both cases, capacitor Cf is connected with the amplifier\u2019s output. Therefore, it is capacitor type of load to the output but can be used to compensate Cpar as you stated in your article. Further, in these cases, we can also say Cpar compensated Cf and made the circuit stable. If you do not agree, would you give us an example, which might make things better in case of capacitor type of load?”
“Well, Cpar should not have to be more than 10pF for sloppy wiring… so Cf will be 10pF or less. Not a lot of loading on the output. Of course, ItoV converters may face direct capacitive sources of more effective Cpar, but again the usual result is that Cf remains small and not a bad output load.”
“I would also add an example regarding impact of input capacitance and series inductance+resistance in transimpedance configuration which is typical for photodiode amplifiers. The most difficult case of opamp oscillation in my practice was quite tricky. It was a simple non-inverting amplifier with capacitive trimmer (few pF) in the feedback (parallel to the feedback resistor of 470 ohms or so ). The circuit was oscillating, but only in some very definite positions of the trimmer (few pF). It was looking totally absurd. I gave up on that on some stage. The solution, finally? – It happened that the trimmer was kind of hollow and there was some resistor mounted underneath it ( just to save space). So in some positions the trimmer’s moving parts were actually shorting the circuits!”
“I would like that all young engineers (and older one) read and remember this notes, in my career I find a lot of design with capacitor on op-amp output, causing ringing and oscillation. Op-amp are too often considered as ideal components! Denis http://www.sysacom.com
“As there are a lot of experiences being related here I can’t resist. Many years ago I was contacted by a one-man operation which made acoustical emission leak detectors and sold them primarily to plumbers. The single product was more-or-less a piezoelectric contact microphone and an amplifier which drove headphones. I consented to do some design work for a new product, something for locating metallic pipes, on a royalty basis. But that is another story. Eventually I got round to looking in greater detail at the leak detection device. The pickup was based on a piezoelectric buzzer, and none of the surrounding electronics were even removed, so I thought I saw an opportunity to improve performance. When I delved into the rest of the instrument I was appalled. There were op amps with gigantic capacitive loads on their outputs. I though at first I just wasn’t following the circuit and these must be power supply bypassing. Nope. I turned out that the guy had parted brass rags with a former partner who did the circuit designs, and decided he could do it on his own. He’d just kept adding capacitors until things stopped oscillating! I redesigned the whole thing, including a JFET in the sensor head and well-behaved gain and filtering in the main enclosure. The improvement in signal-to-noise was about 30dB. He complained that he had to re-write his manual, as the procedure for adjusting gain as one in which the user listened until he heard the noise floor was no longer appropriate.”
“Yes, hope springs eternal. Out of curiosity (or frustration?), I wondered if I could stabilize a really wide-band amplifier by clobbering the bandwidth with arbitrarily large load C. Seemed to work eventually with microfarads, but the supply current was different and the input offset seemed to increase. No oscillation was viewable on the ‘scope. So I made a little loop current antenna connected to a spectrum analyzer, and sure enough, a 2GHz oscillation (verified with supply on and off). So you can hide oscillation with such a load, but not really control it.”
“There are opamps that are designed to work with capacitive load. Look at AD817. They have a single amplifying stage (only one point of high impedance) and the compensation capacitor is connected in a way that a capacitive load adds to the compensation and just lowers the dominant pole.”
“It is true that there is a “patch” for enhanced Cl tolerance within this particular amplifier. This amplifier has a gain node which is buffered as the output. Between gain node and output is a snubber (series R and C). When the output is unloaded there is little voltage across the snubber; when heavy loading such as large capacitance drags the output to be lagging the gain node, the voltage now across the snubber causes current to flow, effectively reducing the gain of the amplifier at high frequencies.. This technique is used on most fast amplifiers of this topology, but loading the output will reduce bandwidth and linearities at high frequencies. Other amplifiers have been designed to directly drive Cloads, mostly for driving LCD display capacitances. These amplifiers are not generally wideband, quiet, nor linear. In fact, a lot of these amplifiers really only drive pure capacitance with a small external series resistor- not really driving the capacitance itself. Finally, there are a couple of amplifiers that really do drive load capacitance directly: zero to perhaps 100pF and then more than perhaps 1000pF- but are not stable between the two spans. Getting wordy here, but I just wanted to comment that most amplifiers will successfully drive more load capacitance if you inject a DC load current into their output. This runs one of the output transistors (we usually favor the N-device) at higher current which improves its Ft and reduces the open-loop output impedance.”
“I have on occasion had to create a push-pull power supply to create a “ground” between two rails. Using an op-amp is the logical choice but I have searched for years and I have never found a discussion of op-amp stability with arbitrarily large load capacitance – such as on a power supply. I have found a couple of app notes; so I just follow those. But is there a more analytical way to approach the problem?”
“Darn good question. OK, we know most op-amps won’t be behaved driving the inevitable many-micro-farads of supply bypass. What can drive it is a bipolar emitter-follower with a substantially capacitive source impedance. The bipolar should have low base resistance (see such discussion toward the bottom of the blog). Hopefully the generated pseudo-ground might have a single polarity of current load so that we don’t have to have a bi-directional emitter-follower. So consider: heavy capacitive bypass loads at the emitter of the follower; a low-Rb transistor like a 2N2907; and about Cload/10 physical capacitance at the follower’s base. This is a good RF buffer, so now to finish the DC’s. We could just waste power in a resistor divider from the supplies to bias the base. This is the simplest and most stable approach. If the load current does reverse a little we could simply load the emitter with current enough to prevent the follower turning off momentarily.”
“The next better DC method is to use an op-amp follower to buffer a higher-impedance divider. The op-amp cannot drive Cl/10 at the transistor base, so they would be coupled with a small-value (50ohm?) series resistor. You can make the pseudo-ground even lower impedance by coupling the op-amp feedback from the final output, through a resistor, and connecting a small capacitor from op-amp output to the -input (inside of the resistor). You have to fiddle with RC product for stability, and you don’t get a constant pseudo-ground impedance over frequency, but at least the DC impedance is very low. If the pseudo-ground currents are bi-directional, you’d need a complementary follower (both npn and pnp) biased from two similar diode-connected transistors at the bases to establish class-AB output bias. The bases each receive Cl/20 capacitors. It’s wise to not try biasing the bases from active npn/pnp followers- you lose the ability to drive capacitive load. Power MOS transistors can be used as well, although they are a lot harder to bias.”
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